Introduction
This chapter describes the operation on the ArduCAM USB2 camera shield. The latest device driver, SDK library and examples can be downloaded from the https://github.com/ArduCAM/ArduCAM_USB_Camera_Shield.
The highlight of the new USB2.0 camera shield Rev.E is that it supports MIPI interface sensors without any MIPI adapter board. It has onboard 16MByte hardware frame buffer, and overcome the bandwidth and dropping frames issue when using the software frame buffer scheme. In addition, with the onboard frame buffer, it supports synchronized multiple cameras taking images exactly at the same time.
Now it well supports both PC and an embedded system like Raspberry Pi, and also can provide customized support for Odroid, Beaglebone Black, Nvidia Jetson TK/TX boards.
Hardware Installation
There are two different camera interface provided on the USB camera shield, but only one camera interface can be used at a time.
MIPI Camera Interface
The MIPI camera interface is used for the 22 pin MIPI camera breakout board. Visit the Featured Camera Modules Supported chapter to see the full list.
Table 1 P1 Connector Pin Definition
| Pin No. | PIN NAME | TYPE | DESCRIPTION |
| 1 | GND | Ground | Power ground |
| 2 | D0_N | Input | MIPI DATA0 N |
| 3 | D0_P | Input | MIPI DATA0 P |
| 4 | GND | Ground | Power ground |
| 5 | D1_N | Input | MIPI DATA1 N |
| 6 | D1_P | Input | MIPI DATA1 P |
| 7 | GND | Ground | Power ground |
| 8 | C_N | Input | MIPI CLOCK N |
| 9 | C_P | Input | MIPI CLOCK P |
| 10 | GND | Ground | Power ground |
| 11 | D2_N | Input | MIPI DATA2 N |
| 12 | D2_P | Input | MIPI DATA2 P |
| 13 | GND | Ground | Power ground |
| 14 | D3_N | Input | MIPI DATA3 N |
| 15 | D3_P | Input | MIPI DATA3 P |
| 16 | GND | Ground | Power ground |
| 17 | PWEN | Output | MIPI Power En(active HIGH) |
| 18 | VCC | POWER | 3.3v Power supply |
| 19 | GND | Ground | Power ground |
| 20 | SCL | Input | Two-Wire Serial Interface Clock |
| 21 | SDA | Bi-directional | Two-Wire Serial Interface Data I/O |
| 22 | VCC | POWER | 3.3v Power supply |
The DVP camera interface is used for the camera breakout board with 30pin ribbon cable. Visit the Featured Camera Modules Supported chapter to see the full list.
Table 2 HDC1 Connector Pin Definition
(Connector Part Number: Hirose FH28D-30S-0.5SH(05))
| Pin No. | PIN NAME | TYPE | DESCRIPTION |
| 1 | GND | Ground | Power ground |
| 2 | NC | – | – |
| 3 | Trigger | Output | Exposure synchronization input |
| 4 | VSYNC | Input | Active High: Frame Valid; indicates active frame |
| 5 | HREF | Input | Active High: Line/Data Valid; indicates active pixels |
| 6 | DOUT11 | Input | Pixel Data Output 11 (MSB) |
| 7 | DOUT10 | Input | Pixel Data Output 10 |
| 8 | DOUT9 | Input | Pixel Data Output 9 |
| 9 | DOUT8 | Input | Pixel Data Output 8 |
| 10 | DOUT7 | Input | Pixel Data Output 7 |
| 11 | DOUT6 | Input | Pixel Data Output 6 |
| 12 | DOUT5 | Input | Pixel Data Output 5 |
| 13 | GND | Ground | Power ground |
| 14 | DOUT4 | Input | Pixel Data Output 4 |
| 15 | DOUT3 | Input | Pixel Data Output 3 |
| 16 | DOUT2 | Input | Pixel Data Output 2 |
| 17 | DOUT1 | Input | Pixel Data Output 1 |
| 18 | DOUT0 | Input | Pixel Data Output 0(LSB) |
| 19 | NC | – | – |
| 20 | PCLK | Input | Pixel Clock output from sensor |
| 21 | SCL | Input | Two-Wire Serial Interface Clock |
| 22 | SDA | Bi-directional | Two-Wire Serial Interface Data I/O |
| 23 | RST_N | Output | Sensor reset signal, active low |
| 24 | GND | Ground | Power ground |
| 25 | GND | Ground | Power ground |
| 26 | STANDBY | Output | Standby-mode enable pin (active HIGH) |
| 27~30 | VCC | POWER | 3.3v Power supply |
Device Driver Installation
The Arducam USB camera shield is not a standard USB Video Class device. Instead, it uses a private driver for our proprietary SDK and API that helps you access all the sensor features from the register level.
Check the Windows Driver Installation chapter to learn about how to install the driver.
Demo Code
Arducam provides a comprehensive SDK library and API for C++ and Python. Besides, we offer a GUI Windows program that helps you easily understand the operation of the ArduCAM USB camera and SDK library.
Check the Software SDK and API chapter to learn more about how to run the demo.
Register Table
Table 3 Register Table
| register address | register type | UC-391 Rev.E (USB 2.0) |
|---|---|---|
| 0x00 | read-only | bit[7:0]：CPLD version number UC-391 Rev.E：0x25 |
| 0x01 | read-write | bit[7]：DVP Camera 8/16bit 0:8bit；1:16bit. bit[5]：DVP Camera pclk polarity 0：normal；1：inverse bit[4]：ircut 0：on；1：off bit[3]：DVP Camera standby 0：normal；1：standby bit[2]：DVP Camera rst_n 0：rst；1：normal。 bit[1]：MIPI Camera standby 0：normal；1：standby。 bit[0]：MIPI Camera rst_n 0：rst；1：normal。 |
| 0x02 | read-write | bit[8]，Select the external trigger connected to CPLD by DVP camera as input or output of CPLD 0：CPLD input；1：CPLD output。 bit[4]，Choose whether the internal simulative data a counter or a color bar 0：color bar；1：counter。 bit[2]：simulative data/camera data 0：camera data；1：simulative data bit[0]：DVP Camera vsyn polarity 0：normal；1：inverse |
| 0x03 | read-write | bit[7]：cpld reset 0：normal；1：reset Set it to 1 and then set it back to 0.。 bit[6]：Pause Camera Data Input 0：normal；1：pause。 bit[5]：Single shot （Not valid until bit [6] is 1） 0：wait；1：Start a single shot Set it to 1 and then set it back to 0. |
| 0x04 | read-write | bit[7:0]：Frame skipping function. Because the number of input frames may be faster than the bandwidth of USB 2.0, the number of uploaded frames can be reduced by frame hopping. m=bit[7:4] n=bit[3:0] Normally,for each n frames, take m frames. 0x00，No frame skipping 0x01，Skip 1 frame.That’s1/2（To be compatible with Rev.C.） 0x11，No frame skipping 0x12，1/2 0x13，1/3 …… 0x1F，1/15 |
| 0x05 | read-only | bit[7:0]，CPLD version year For example: decimal 19, the upper machine readable register value will be added 2000, indicating 2019. |
| 0x06 | read-only | bit[7:0]，CPLD version month For example: decimal 08, for August |
| 0x07 | read-only | bit[7:0]，CPLD version date For example: decimal 03, for 3 |
| 0x08 | read-write | bit[7]：Is data uploaded to USB 0：normal；1：Stop uploading bit[0]，Upper computer clears finish ID of single-shot mode 0：Not clear up；1：clear up Set it to 1 and then set it back to 0. |
| 0x09 | read-only | bit[0]，finish ID of single shot mode 0：unfinished；1：finished |
| 0x0A | read-write | bit[1:0]：Data Bit Selection of DVP Camera DVP Camera，The input data is 12 bits 【8-bit mode】 0：dvp_data[11:4] 1：dvp_data[9:2] 2：dvp_data[7:0] 【16-bit mode】 0：{4’d0, dvp_data[11:0]} 1：{6’d0, dvp_data[9:0]} |
| 0x0C | read-write | bit[7]:Camera Selection 0:DVP Camera；1：MIPI Camera bit[4]：MIPI RAW format 0：raw8；1：raw10。 bit[1:0]：MIPI channel 0:1Lane；1:2Lane；2:4Lane。 |
| 0x0D | read-write | MIPI，Image resolution，column，High 8 bits |
| 0x0E | read-write | MIPI，Image resolution，column，Low 8 bits |
| 0x0F | read-write | MIPI，Image resolution，row，High 8 bits |
| 0x10 | read-write | MIPI，Image resolution，row，Low 8 bits |
| 0x11 | read-write | bit[6]，Verification of Word Count Ended by MIPI VSYN （Ending WC should be the same as starting WC.） 0：No check；1：check bit[5：4]，ECC check mode 3：{DI, WC_I, WC_H} 2：{DI, WC_H, WC_I} 1：{WC_I, WC_H, DI} 0：{WC_H, WC_I, DI} bit[3]，WC Check of MIPI VSYN Start （WC will increase） 0：No check；1：check bit[2]，WC Check of MIPI HREF 0：No check；1：check bit[1]，data_type check （Is it raw8 or raw10?） 0：No check；1：check bit[0]，MIPI ECC check 0：No check；1：check |
| 0x12 | read-write | bit[7]，Two Extended IOs as PWM or GPIO。 0，GPIO；1，PWM。 bit[1:0]，GPIO Direction。 0，CPLD input；1，CPLD output。 |
| 0x13 | read-only | bit[1:0]，GPIO read-in values。 |
| 0x14 | read-write | bit[1:0]，GPIO write-out values。 for example： If 0x12 writes 0x03, 0x14 writes 0x55, then GPIO is output with a value of 0x03. If 0x12 writes 0x01, 0x14 writes 0x01, then GPIO [1] is the input; GPIO [0] is the output, and the value is 0x01. |
| 0x15 | read-write | bit[5:4], Selection of pwm_0 Cycle Counting Clock 3：320us 2：160us 1：80us 0：40us bit[1:0], Clock selection for pwm_0 high-level counting 3：40us 2：20us 1：10us 0：5us |
| 0x16 | read-write | bit[7:0]，Number of High Level Width Clocks in pwm_0 |
| 0x17 | read-write | bit[7:0]，Number of pwm_0 Periodic Width Clocks |
| 0x18 | read-write | bit[5:4], Selection of pwm_1 Cycle Counting Clock 3：320us 2：160us 1：80us 0：40us bit[1:0], Clock selection for pwm_1 high-level counting 3：40us 2：20us 1：10us 0：5us |
| 0x19 | read-write | bit[7:0]，Number of Clocks with High Level Width in pwm_1 |
| 0x1A | read-write | bit[7:0]，Number of pwm_1 Periodic Width Clocks |
| 0x1E | read-only | Read MIPI parsed information bit[7:0]: MIPI DATA ID |
| 0x1F | read-only | Read MIPI parsed information bit[4:0]: MIPI，Image resolution，column，High 5 bits |
| 0x20 | read-only | Read MIPI parsed information bit[7:0]: MIPI，Image resolution，column，Low 7 bits |
| 0x21 | read-only | Read MIPI parsed information bit[4:0]: MIPI，Image resolution，row，High 5 bits |
| 0x22 | read-only | Read MIPI parsed information bit[7:0]: MIPI，Image resolution，row，Low 7 bits |
Configuration Files Guide
When USB2.0 Camera Shield Rev.E is used with different cameras or different modes of the same camera, the upper computer needs to load the different configuration file.
USB2.0 Camera Shield Rev.E config files is here:
https://github.com/ArduCAM/ArduCAM_USB_Camera_Shield/tree/master/Config/USB2.0_UC-391_Rev.E
The following configuration file will be used as an example to illustrate a detailed description of the contents of the configuration file, so that you can modify it to suit your needs.
About Comments
The lines starting with “;” and “//” are all comments.
Large comments at the beginning of the configuration file are a description of the display mode, camera address, and other configuration methods.
Comments are sometimes added after the camera register configuration to explain the register function.
Display Mode and Camera Address Configuration
Lines starting with [camera parameter] are for configuring the display mode and camera address.
① CFG_MODE
CFG_MODE = 0：Parameters can be modified in the upper computer software interface.
CFG_MODE = 1：Parameters can not be modified in the upper computer software interface.
② TYPE
TYPE is used to mark the camera model for easy viewing.
NOTE: TYPE is just a comment, it doesn’t matter if you write it wrong.
③ SIZE
If it does not match the actual output resolution of the camera, a Bad frame received error will be displayed.
Click 【Tools】-【Data Info】 to view the MIPI camera resolution message from the hardware CPLD in real time.
④ BIT_WIDTH
NOTE:
- MIPI RAW8 mode: camera output is 8bit, BIT_WIDTH is set to 8bit.
- MIPI RAW10 mode: camera output is 10bit. Because the upper computer cannot parse RAW10 at the moment, the CPLD hardware on USB2.0 Camera Shield Rev. E is throwing away the lower two bits of 10bit and turning them into 8bit before uploading, so BIT_WIDTH is also set to 8bit.
- DVP mode: DVP input is 12bit. If BIT_WIDTH is set to 8, the high 8 bits of 12 bits are taken; if BIT_WIDTH is set to 12, it is filled into 16 bits of data (high 4 bits are filled with 0) and then uploaded, while the bit[7] of CPLD register 0x01 should be set to 1. At this time, the data bit width is doubled, so the bandwidth is also doubled, which may lead to the bandwidth exceeding the limit of USB2 (about 40MB/s) and needs to be processed by frame down.
Example for BIT_WIDTH = 12
④ FORMAT
FORMAT = 0, 2 means the order of GB in the four arrangements of RAW, or you can load the configuration file and then switch to adjust it in the lower right corner of the upper computer.
⑤ I2C_MODE & I2C_ADDR
I2C_MODE = 2 means the camera I2C operating mode is 16-bit address, 8-bit data.
I2C_ADDR = 0x6C means that the imager device address is 0x6C.
The I2C operating mode and device address of the imager should be referred to the imager manual or other reference materials.
USB Firmware and CPLD Configuration
Only the configuration in [board parameter] and [board parameter][dev2] are valid for the USB2.0 Camera Shield Rev.E.
① USB Firmware Configuration
VRCMD = 0xF6, 0x0000, 0x0000, 3, 0x03, 0x04, 0x0C are USB2.0 firmware configurations, which generally do not need to be changed.
② CPLD Configuration
On the USB2.0 Camera Shield Rev.E has a CPLD for camera data processing.
The CPLD can achieve different functions through register configuration.
Register Table
| register address | register type | UC-391 Rev.E (USB 2.0) |
| 0x00 | read-only | bit[7:0]：CPLD version number UC-391 Rev.E：0x25 |
| 0x01 | read-write | bit[7]：DVP Camera 8/16bit 0:8bit；1:16bit。 bit[5]：DVP Camera pclk polarity 0：normal；1：inverse bit[4]：ircut 0：on；1：off bit[3]：DVP Camera standby 0：normal；1：standby。 bit[2]：DVP Camera rst_n 0：rst；1：normal。 bit[1]：MIPI Camera standby 0：normal；1：standby。 bit[0]：MIPI Camera rst_n 0：rst；1：normal。 |
| 0x02 | read-write | bit[8]，Select the external trigger connected to CPLD by DVP camera as input or output of CPLD 0：CPLD input；1：CPLD output。 bit[4]，Choose whether the internal simulative data a counter or a color bar 0：color bar；1：counter。 bit[2]：simulative data/camera data 0：camera data；1：simulative data bit[0]：DVP Camera vsyn polarity 0：normal；1：inverse |
| 0x03 | read-write | bit[7]：cpld reset 0：normal；1：reset Set it to 1 and then set it back to 0.。 bit[6]：Pause Camera Data Input 0：normal；1：pause。 bit[5]：Single shot （Not valid until bit [6] is 1） 0：wait；1：Start a single shot Set it to 1 and then set it back to 0. |
| 0x04 | read-write | bit[7:0]：Frame skipping function. Because the number of input frames may be faster than the bandwidth of USB 2.0, the number of uploaded frames can be reduced by frame hopping. m=bit[7:4] n=bit[3:0] Normally,for each n frames, take m frames. 0x00，No frame skipping 0x01，Skip 1 frame.That’s1/2（To be compatible with Rev.C.） 0x11，No frame skipping 0x12，1/2 0x13，1/3 …… 0x1F，1/15 |
| 0x05 | read-only | bit[7:0]，CPLD version year For example: decimal 19, the upper machine readable register value will be added 2000, indicating 2019. |
| 0x06 | read-only | bit[7:0]，CPLD version month For example: decimal 08, for August |
| 0x07 | read-only | bit[7:0]，CPLD version date For example: decimal 03, for 3 |
| 0x08 | read-write | bit[7]：Is data uploaded to USB 0：normal；1：Stop uploading bit[0]，Upper computer clears finish ID of single-shot mode 0：Not clear up；1：clear up Set it to 1 and then set it back to 0. |
| 0x09 | read-only | bit[0]，finish ID of single shot mode 0：unfinished；1：finished |
| 0x0A | read-write | bit[1:0]：Data Bit Selection of DVP Camera DVP Camera，The input data is 12 bits 【8-bit mode】 0：dvp_data[11:4] 1：dvp_data[9:2] 2：dvp_data[7:0] 【16-bit mode】 0：{4’d0, dvp_data[11:0]} 1：{6’d0, dvp_data[9:0]} |
| 0x0C | read-write | bit[7]:Camera Selection 0:DVP Camera；1：MIPI Camera bit[4]：MIPI RAW format 0：raw8；1：raw10。 bit[1:0]：MIPI channel 0:1Lane；1:2Lane；2:4Lane。 |
| 0x0D | read-write | MIPI，Image resolution，column，High 8 bits |
| 0x0E | read-write | MIPI，Image resolution，column，Low 8 bits |
| 0x0F | read-write | MIPI，Image resolution，row，High 8 bits |
| 0x10 | read-write | MIPI，Image resolution，row，Low 8 bits |
| 0x11 | read-write | bit[6]，Verification of Word Count Ended by MIPI VSYN （Ending WC should be the same as starting WC.） 0：No check；1：check bit[5：4]，ECC check mode 3：{DI, WC_I, WC_H} 2：{DI, WC_H, WC_I} 1：{WC_I, WC_H, DI} 0：{WC_H, WC_I, DI} bit[3]，WC Check of MIPI VSYN Start （WC will increase） 0：No check；1：check bit[2]，WC Check of MIPI HREF 0：No check；1：check bit[1]，data_type check （Is it raw8 or raw10?） 0：No check；1：check bit[0]，MIPI ECC check 0：No check；1：check |
| 0x12 | read-write | bit[7]，Two Extended IOs as PWM or GPIO。 0，GPIO；1，PWM。 bit[1:0]，GPIO Direction。 0，CPLD input；1，CPLD output。 |
| 0x13 | read-only | bit[1:0]，GPIO read-in values。 |
| 0x14 | read-write | bit[1:0]，GPIO write-out values。 for example： If 0x12 writes 0x03, 0x14 writes 0x55, then GPIO is output with a value of 0x03. If 0x12 writes 0x01, 0x14 writes 0x01, then GPIO [1] is the input; GPIO [0] is the output, and the value is 0x01. |
| 0x15 | read-write | bit[5:4], Selection of pwm_0 Cycle Counting Clock 3：320us 2：160us 1：80us 0：40us bit[1:0], Clock selection for pwm_0 high-level counting 3：40us 2：20us 1：10us 0：5us |
| 0x16 | read-write | bit[7:0]，Number of High Level Width Clocks in pwm_0 |
| 0x17 | read-write | bit[7:0]，Number of pwm_0 Periodic Width Clocks |
| 0x18 | read-write | bit[5:4], Selection of pwm_1 Cycle Counting Clock 3：320us 2：160us 1：80us 0：40us bit[1:0], Clock selection for pwm_1 high-level counting 3：40us 2：20us 1：10us 0：5us |
| 0x19 | read-write | bit[7:0]，Number of Clocks with High Level Width in pwm_1 |
| 0x1A | read-write | bit[7:0]，Number of pwm_1 Periodic Width Clocks |
| 0x1E | read-only | Read MIPI parsed information bit[7:0]: MIPI DATA ID |
| 0x1F | read-only | Read MIPI parsed information bit[4:0]: MIPI，Image resolution，column，High 5 bits |
| 0x20 | read-only | Read MIPI parsed information bit[7:0]: MIPI，Image resolution，column，Low 7 bits |
| 0x21 | read-only | Read MIPI parsed information bit[4:0]: MIPI，Image resolution，row，High 5 bits |
| 0x22 | read-only | Read MIPI parsed information bit[7:0]: MIPI，Image resolution，row，Low 7 bits |
CPLD is 8-bit address, 8-bit data working mode.
① Set frame skip
VRCMD = 0xD7, 0x4600, 0x0400, 1, 0x12
Register 0x04 is used to set the frame skipping function.
When the camera output frame rate is fast and exceeds the USB2.0 transfer bandwidth (USB2.0 bandwidth is about 40MB/s), the CPLD can perform frame skipping processing to reduce the number of uploaded frames to fit the USB2.0 bandwidth without changing the camera configuration.
Take the configuration file OV5647_MIPI_2Lane_RAW8_8b_2592x1944_8fps.cfg as an example
The camera itself outputs 16fps, the camera output bandwidth is 2592 x 1944 x 16/1024/1024 = 76.9MB/s, which exceeds the USB2.0 bandwidth (40MB/s).
If you do not do frame skipping, the camera keeps sending data to the CPLD, and the USB2.0 is too late to take the data, then the CPLD cache will soon be overflowed, resulting in data disorder, and the upper computer will report errors when displaying, and the green LED on the board will become bright.
For example, set 0x04 to 0x00, without frame skipping processing.
VRCMD = 0xD7, 0x4600, 0x0400, 1, 0x00
In this case, either change the camera configuration (lower PLL, increase HTS or VTS), or reduce the upload bandwidth by dropping some of the frame data through the CPLD frame skipping function.
The meaning of the 0x04 register value is shown below:
The value is 0xMN, in general, only M frames are uploaded per N frames; 0x00, 0x01 and 0x11 are special values.
For example, if 0x04 is set to 0x12
VRCMD = 0xD7, 0x4600, 0x0400, 1, 0x12
That only 1 frame is uploaded for every 2 frames, the upload bandwidth becomes 76.9 / 2 = 38.4 MB/s, which is less than the USB2.0 bandwidth (40 MB/s).
Click 【load】to reload the modified configuration, then click 【open】 and 【play】.
The upper computer can output the picture normally, no longer report the error, the bottom left corner shows the current frame rate is 8fps (the camera itself outputs 16fps but it becomes 8fps after the frame skipping).
NOTE:
- The maximum frame skipping can be set to 0x1F, which means that only 1 frame is taken every 15 frames.
- If the camera itself is not fast and the frame skipping is set too large, it may cause the USB not to receive data for a long time (about one or two seconds), at this time the upper computer can output the picture, but still report an error (USB transfer timeout error).
② Set MIPI Lane channel and RAW format
VRCMD = 0xD7, 0x4600, 0x0C00, 1, 0x81
- MIPI Lane channels have 1Lane, 2Lane and 4Lane configurations.
- RAW has two types of RAW8 and RAW10 (other RAW formats are not supported at this time).
| Lane channel | RAW Format | 0x0C value |
| 1 | RAW8 | 0x80 |
| 2 | RAW8 | 0x81 |
| 4 | RAW8 | 0x82 |
| 1 | RAW10 | 0x90 |
| 2 | RAW10 | 0x91 |
| 4 | RAW10 | 0x92 |
NOTE
If Lane channel and RAW format are not configured correctly, it will result in the CPLD not being able to parse the MIPI data and the upper computer not being able to output the image.
③ Set the MIPI resolution reference value
VRCMD = 0xD7, 0x4600, 0x0D00, 1, 0x0A VRCMD = 0xD7, 0x4600, 0x0E00, 1, 0x20 VRCMD = 0xD7, 0x4600, 0x0F00, 1, 0x07 VRCMD = 0xD7, 0x4600, 0x1000, 1, 0x98
The registers 0x0D to 0x10 are used to set the resolution referenced value. 0x0D to 0x10 is meaningful when the wordcount checksum (bit[2] of register 0x11) is turned on for MIPI resolution.
- If 0x11 is set to 0x03, the wordcount checksum is not turned on, 0x0D ~ 0x10 can be ignored.
- If 0x11 is set to 0x07, 0x0D ~ 0x0E value must be correct, otherwise HREF can not be parsed out, the upper computer can not output the image.
④ Set MIPI checksum
VRCMD = 0xD7, 0x4600, 0x1100, 1, 0x07
Register 0x11 is used to set several MIPI checksum methods (DataID, WordCount, ECC).
MIPI data contains DataID, WordCount, and ECC data regardless of whether it is a short packet (indicating field start and field end) or a long packet (indicating a line of data).
DataID is divided into VC (Virtual Channel) and DT (DataType).
VC is generally not used; RAW8 and RAW10 are commonly used by DT.
NOTE
If the MIPI checksum is not set or set incorrectly, it may lead to the MIPI data parsing error and can not produce the map.
- bit[0] sets the ECC checksum, which is usualluy set to 1.
- bit[1] sets the DataType checksum. When set to 1, only MIPI data with RAW8 (DataType=0x2A) or RAW10 (DataType=0x2B) can be parsed.
- bit[2] sets the WordCount check, MIPI data can only be parsed if the WordCount is the same as the set value of 0x0D~0x0E when bit[2] is set to 1.
- bit[5:4] sets the order of ECC generation. ECC is generated based on the three bytes DI, WC_H and WC_I, and the ECC values generated by different orders are different.
Most cameras can configure this order, and the default order is usually DI, WC_I, and WC_H.
In general.
- 2Lane or 4Lane only need to enable the ECC check and DataType check, WordCount check could not be enabled. In other words, the 0x11 register is set to 0x03, and it does not matter if the 0x0D to 0x10 registers are not used
VRCMD = 0xD7, 0x4600, 0x1100, 1, 0x03
- WordCount checksum needs to be enabled at 1Lane, otherwise the parsing may be unstable. In other words, 0x11 register is set to 0x07, at this time, 0x0D～0x10 registers need to be set correctly according to the actual resolution, if the resolution is not set correctly, it will cause HREF not to be resolved, and the upper computer will not be able to output the image.
For example, OV7251 1Lane RAW8 configuration:
③ Camera Configuration
[register parameter]: Register parameter set for USB2.0 & USB 3.0 mode.
[register parameter][dev2]: Register parameter set for USB2.0 mode.
[register parameter][dev3][inf2]: Register parameter set for USB3.0 mode and USB 2.0 interface.
[register parameter][dev3][inf3]: Register parameter set for USB3.0 mode and USB 3.0 interface.
Only the configurations in [register parameter] and [register parameter][dev2] are valid for the USB 2.0 Camera Shield Rev.E
For example:
- REG = 0x3035, 0x11 means the address is 16 bits and the data is 8 bits.
- The I2C_MODE and I2C_ADDR at the beginning of the configuration file should be set correctly first.
The specific configuration of the camera requires reference to the datasheet.
Commonly used registers such as PLL, VTS/HTS, Exposure, Gain, RAW mode, etc.
Modification Examples
The following are a few scenarios for modifying the configuration file for reference.
① Change RAW8 to RAW10
Take the configuration file OV5647_MIPI_2Lane_RAW8_8b_2592x1944_8fps.cfg as an example, now we want to modify it to 2Lane RAW10 2592×1944 configuration, i.e. the number of Lanes and resolution remain the same, just modify the RAW format.
First, make a copy of OV5647_MIPI_2Lane_RAW8_8b_2592x1944_8fps.cfg.
Second, rename the copied file.
Third, open with a text editor (e.g. Notepad++).
Since the camera and resolution are not changed, the [Camera parameter] section does not need to be modified.
In the CPLD configuration, change the 0x0C register value from 0x81 to 0x91.
Check the camera manual and find the register for modifying the RAW format.
The 0x3034 register defines the RAW format. The default value is 0x1A, which means RAW10; if it is 0x18, it means RAW8.
Then look for 0x3034 in the configuration file, and find it in two places, the last one prevailing.
0x3034 current value is 0x18, change it to 0x1A.
Save the modified configuration file.
Click 【refresh】 to see the newly created file only in the drop-down list.
Click 【load】-【open】-【play】 in turn, out normal image.
Click 【Tools】-【Data Info】
It shows that the DataType parsed by the CPLD is 0x2B, which also indicates that it is indeed in RAW10 format.
NOTE
1.If the upper computer reports badframe error after RAW8 is changed to RAW10, it may be because the amount of data in one line is increased to 1.25 times, and the HTS is too small, so the HTS needs to be increased to output the image.
2.Some cameras also need to modify the PLL register when the RAW format is modified.
3.Because the upper computer cannot parse RAW10 at present, the CPLD on USB2.0 Camera Shield Rev. E is throwing away the lower two bits of 10bit and turning them into 8bit before uploading, so BIT_WIDTH is set to 8bit.
② Fix RAW Format and Resolution
The following is how to correct the profile if the number of Lanes is known, but the RAW format and exact resolution are not known ( assuming that the camera output is normal, just not sure that the USB2 Camera Shield is properly configured).
Still take OV5647_MIPI_2Lane_RAW8_8b_2592x1944_8fps.cfg configuration file as an example.
First, make a copy of OV5647_MIPI_2Lane_RAW8_8b_2592x1944_8fps.cfg, then modify this copy file.
Open with a text editor (e.g. Notepad++).
We intentionally changed the SIZE wrong from 2592,1944 to 2500,1900
Change the 0x0C register to 0x91 from 0x81 by mistake as well.
The upper computer loads this configuration file and the error is reported (Bad frame received).
MIPI Data Info information is also abnormal.
Then, we change the 0x11 register value from 0x07 (or 0x03) to 0x01.
Save, reload, and check the MIPI Data Info.
0x2A indicates RAW8 with a resolution of 2592×1944.
Now fix the configuration file:
- change the SIZE to 2592,1944.
- change 0x11 to 0x03.
- change 0x0C to 0x81.
The image will come out normally.
NOTE
If the camera output is in RAW10 format, after changing 0x11 to 0x01, the Col value in MIPI Data Info at this time is not the column resolution, but the number of rows (WordCount).
For example, the following figure shows the result after changing 0x11 to 0x01 on the RAW10 configuration.
0x2B means it is RAW10, and the amount of RAW10 data is 1.25 times of RAW8, so the column resolution should be 3240/1.25=2592.
Or fix 0x11 and 0x0C first (change 0x11 to 0x03 and 0x0C to 0x91), then check MIPI Data Info (Col and Row are accurate at this point), and finally fix SIZE.
